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LTC1473L Dual Low Voltage PowerPathTM Switch Driver
FEATURES
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DESCRIPTIO
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Power Path Management for Systems with Multiple DC Sources Switches and Isolates Sources from 3.3V to 10V All N-Channel Switching to Reduce Power Losses and System Cost Built-In Step-Up Regulator for N-Channel Gate Drive Capacitor Inrush and Short-Circuit Current Limited User-Programmable Timer Prevents Overdissipation During Current Limiting Undervoltage Lockout Prevents Operation with Low Inputs Small Footprint: 16-Pin Narrow SSOP
The LTC(R)1473L provides reliable and efficient switching between two DC power sources. This device drives two external sets of back-to-back N-channel MOSFET switches to route power to the input of a low voltage system. An internal boost regulator provides the voltage to fully enhance the logic-level N-channel MOSFET switches while an internal undervoltage lock-out circuit keeps the system alive down to 2.8V. The LTC1473L senses current to limit inrush between the batteries and the system supply capacitor during switchover transitions or during fault conditions. A user-programmable timer monitors the time the MOSFET switches are in current limit and latches them off when the programmed time is exceeded. A unique "2-diode" logic mode ensures system start-up regardless of which input receives power first.
, LTC and LT are registered trademarks of Linear Technology Corporation. PowerPath is a trademark of Linear Technology Corporation.
APPLICATIO S
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Portable Computers Portable Instruments Fault Tolerant Computers Battery-Backup Systems 3.3V/5V Power Management
TYPICAL APPLICATIO
DCIN 3.3V
3.3V to 4-Cell NiMH Backup Switch
Si9926DY
BAT54C LOGIC DRIVEN VBAT1 4x NiMH
1 2 3 4 5 6
LTC1473L IN1 IN2 DIODE TIMER V+ VGG SW GND GA1 SAB1 GB1
16 15 14 RSENSE 0.04
13 SENSE + 12 SENSE - 11 GA2 10 SAB2 9 GB2
CTIMER 2000pF
1mH* 1F 1F
7 8
* COILCRAFT 1812LS-105XKBC
Si9926DY
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COUT 3.3V OR VBAT1
1473 TA01
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1
LTC1473L
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW IN1 1 IN2 2 DIODE 3 TIMER 4 V+ 5 VGG 6 SW 7 GND 8 16 GA1 15 SAB1 14 GB1 13 SENSE + 12 SENSE - 11 GA2 10 SAB2 9 GB2
SENSE +, SENSE -, V + .................................. - 0.3 to 10V GA1, GB1, GA2, GB2 ................................... - 0.3 to 20V SAB1, SAB2 ................................................. - 0.3 to 10V SW, VGG ...................................................... - 0.3 to 20V IN1, IN2, DIODE ...........................................- 0.3V to 7V Junction Temperature (Note 2) ............................. 125C Operating Temperature Range ..................... 0C to 70C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
ORDER PART NUMBER LTC1473LCGN
GN PART MARKING 1473L
GN PACKAGE 16-LEAD NARROW PLASTIC SSOP TJMAX = 125C, JA = 150C/ W
Consult factory for Military and Industrial grade parts.
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. Test circuit, V+ = 5V, unless otherwise specified.
SYMBOL V+ IS VGS V+ V+
UVLO UVLOHYS
ELECTRICAL CHARACTERISTICS
PARAMETER Supply Operating Range Supply Current VGS Gate Supply Voltage V + Undervoltage Lockout Threshold V + Undervoltage Lockout Hysteresis Digital Input Logic High Digital Input Logic Low Input Current Gate-to-Source ON Voltage Gate-to-Source OFF Voltage SENSE + Input Bias Current (Note 4) (Note 4)
CONDITIONS VIN1 = VDIODE = 5V, VIN2 = 0V, VSENSE = VSENSE = 5V VGS = VGG - V +, 2.8V V + 10V (Note 3) V + Ramping Down
+ -
MIN 2.8
q q q
TYP 100
MAX 9 200 9.5 2.8
UNITS V A V V mV V
7.5 2.3 2
8.5 2.5 70 0.9 0.6
VHIDIGIN VLODIGIN IIN VGS(ON) VGS(OFF) IBSENSE
+
q q
0.4 1 7.0 0.4 10 - 75 10 - 75 0.25 0.30 35 300 9 1.25
VIN1 = VIN2 = VDIODE = 5V IGA1 = IGA2 = IGB1 = IGB2 = - 1A, VSAB1 = VSAB2 = 5V IGA1 = IGA2 = IGB1 = IGB2 = 100A, VSAB1 = VSAB2 = 5V VSENSE VSENSE 10V (Note 3) VSENSE + = VSENSE - = 0V (Note 5) VSENSE + = VSENSE - = 10V (Note 3) VSENSE + = VSENSE - = 0V (Note 5) VSENSE - = 10V (VSENSE + - VSENSE -) (Note 3) VSENSE - = 0V (VSENSE + - VSENSE -) VIN1 = VIN2 = VDIODE = 0.4V, V + = 10V (Note 3) VIN1 = VIN2 = 0.4V, VDIODE = 2V VIN1 = 0.4V, VIN2 = VDIODE = 2V, VTIMER = 0V, VSENSE + - VSENSE - = 300mV VIN1 = 0.4V, VIN2 = VDIODE = 2V CGS = 1000pF, VSAB1 = VSAB2 = 0V (Note 6) CGS = 1000pF, VSAB1 = VSAB2 = 5V (Note 6) CGS = 1000pF, VSAB1 = VSAB2 = 0V (Note 6) CGS = 1000pF, VSAB1 = VSAB2 = 5V (Note 6)
q q
+= -=
q q q q q q
4.5 2 - 300 2 - 300 0.15 0.10 5 30 3 1.05
5.6 0 4.5 - 175 4.5 - 175 0.20 0.20 20 140 6 1.16 33 2 22 1 30
IBSENSE - VSENSE IPDSAB ITIMER VTIMER t ON t OFF t D1 t D2 fOVGG
SENSE - Input Bias Current Inrush Current Limit Sense Voltage SAB1, SAB2 Pull-Down Current Timer Source Current Timer Latch Threshold Voltage Gate Drive Rise Time Gate Drive Fall Time Gate Drive Turn-On Delay Gate Drive Turn-Off Delay VGS Regulator Operating Frequency
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V A V V A A A A V V A A A V s s s s kHz
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LTC1473L
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD)(150C/W) Note 3: Some tests are performed under more stringent conditions to ensure reliable operation over the entire supply voltage range. Note 4: Digital inputs include: IN1, IN2 and DIODE. Note 5: IS increases by the same amount as IBSENSE+ + IBSENSE- when their common mode falls below 5V. Note 6: Gate turn-on and turn-off times are measured with no inrush current limiting, i.e., VSENSE = 0V. Gate rise times are measured from 1V to 4.5V and fall times are measured from 4.5V to 1V. Delay times are measured from the input transition to when the gate voltage has risen or fallen to 3V. Results are not tested, but guaranteed by design.
TYPICAL PERFOR A CE CHARACTERISTICS
DC Supply Current vs Supply Voltage
250 VSENSE + = VSENSE - = V +
200
SUPPLY CURRENT (A)
SUPPLY CURRENT (A)
150
VDIODE = VIN1 = 5V VIN2 = 0V
110 100 90 80 70 60
VDIODE = VIN1 = 5V VIN2 = 0V
SUPPLY CURRENT (A)
100 VDIODE = 5V VIN1 = VIN2 = 0V
50
0
0
1
2
3
4
5
6
7
SUPPLY VOLTAGE (V)
1473 G01
VGS Gate-to-Source ON Voltage vs Temperature
UNDERVOLTAGE LOCKOUT THRESHOLD (V)
6.0
VGS GATE-TO-SOURCE ON VOLTAGE (V)
V + = VSAB = 10V
5.9 5.8 5.7 5.6 5.5 5.4 5.3 5.2 5.1 - 60 - 40 -20 0 20 40 60 TEMPERATURE (C) 80 100
1473 G04
2.65 2.60 2.55 2.50 2.45 2.40 2.35 2.30
START-UP THRESHOLD
VGS GATE SUPPLY VOLTAGE (V)
UW
8 9 10
DC Supply Current vs Temperature
140 130 120 V + = 5V
400 350 300 250 200 150 100 50 0
DC Supply Current vs VSENSE
V+ = 5V VDIODE = VIN1 = 5V VIN2 = 0V VSENSE+ - VSENSE- = 0V
50 - 50
- 25
25 50 0 TEMPERATURE (C)
75
100
0
1
2345678 VSENSE COMMON MODE (V)
9
10
1473 G02
1473 G03
Undervoltage Lockout Threshold (V +) vs Temperature
2.75 2.70 9.0 8.9 8.8 8.7 8.6 8.5 8.4 8.3 8.2 80 100
VGS Gate Supply Voltage vs Temperature
V + = 5V VGS = VGG - V +
SHUTDOWN THRESHOLD
2.25 - 60 -40 -20 0 20 40 60 TEMPERATURE (C)
8.1 20 40 60 - 60 - 40 - 20 0 TEMPERATURE (C)
80
100
1473 G05
1473 G06
3
LTC1473L TYPICAL PERFOR A CE CHARACTERISTICS
Turn-Off Delay and Gate Fall Time vs Temperature
TURN-OFF DELAY AND GATE FALL TIME (s)
2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6
TURN-ON DELAY AND GATE RISE TIME (s)
V + = 5V CLOAD = 1000pF VSAB = 5V GATE FALL TIME
RISE AND FALL TIME (s)
TURN-OFF DELAY
0.4 20 40 60 -60 -40 - 20 0 TEMPERATURE (C)
Logic Input Threshold Voltage vs Temperature
2.0 1.8
TIMER LATCH THRESHOLD VOLTAGE (V)
INPUT THRESHOLD VOLTAGE (V)
1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 - 60 -40 -20 0 20 40 60 TEMPERATURE (C) 80 100 V + = 2.8V V + = 10V
Timer Source Current vs Temperature
8.5 8.0
TIMER SOURCE CURRENT (A)
V + = 5V TIMER = 0V
SENSE PIN CURRENT (A)
7.5 7.0 6.5 6.0 5.5 5.0 4.5 4.0 - 50 - 25 25 50 75 0 TEMPERATURE (C) 100 125
4
UW
80 100
1473 G07
Turn-On Delay and Gate Rise Time vs Temperature
45 40 35 30 25 20 15 10 5 0 20 40 60 - 60 - 40 - 20 0 TEMPERATURE (C) 80 100 TURN-ON DELAY V + = 5V CLOAD = 1000pF VSAB = 0V
40 35 30 25 20 15 10 5 0
Rise and Fall Time vs Gate Capacitive Loading
GATE RISE TIME
RISE TIME VSAB = 0V
FALL TIME VSAB = 5V 10 100 1000 GATE CAPACITIVE LOADING (pF) 10000
1473 G08
1473 G08
Timer Latch Threshold Voltage vs Temperature
1.28 1.26 1.24 1.22 1.20 1.18 1.16 1.14 1.12 1.10 - 50 - 25 25 50 75 0 TEMPERATURE (C) 100 125 V + = 5V
1473 G10
1473 G11
SENSE Pin Source Current (IBSENSE) vs VSENSE
300 250 200 150 100 50 0 - 50 0 1 2 3 456 VSENSE (V) 7 8 9 10 V+ = 5V VDIODE = VIN1 = 5V VIN2 = 0V VSENSE+ - VSENSE- = 0V
1473 G12
1473 G13
LTC1473L
PI FU CTIO S
IN1 (Pin 1): Logic Input of Gate Drivers GA1 and GB1. IN1 is disabled when IN2 is high or DIODE is low. During 2-diode mode, asserting IN1 disables the fault timer function. IN2 (Pin 2): Logic Input of Gate Drivers GA2 and GB2. IN2 is disabled when IN1 is high or DIODE is low. During 2-diode mode, asserting IN2 disables the fault timer function. DIODE (Pin 3): "2-Diode Mode" Logic Input. Diode overrides IN1 and IN2 by forcing the two back-to-back external N-channel MOSFET switches to mimic two diodes. TIMER (Pin 4): Fault Timer. A capacitor connected from this pin to GND programs the time the MOSFET switches are allowed to be in current limit. To disable this function, Pin 4 can be grounded. V+ (Pin 5): Power Supply. Bypass this pin with at least a 1F capacitor. VGG (Pin 6): Gate Driver Supply. This high voltage supply is intended only for driving the internal micropower gate drive circuitry. Do not load this pin with any external circuitry. Bypass this pin with at least 1F. SW (Pin 7): Open Drain of an Internal N-Channel MOSFET Switch. This pin drives the bottom of the VGG switching regulator inductor which is connected between this pin and the V+ pin. GND (Pin 8): Ground. GB2, GA2 (Pins 9, 11): Switch Gate Drivers. GA2 and GB2 drive the gates of the second back-to-back external N-channel switches. SAB2 (Pin 10): Source Return. The SAB2 pin is connected to the sources of SW A2 and SW B2. A small pull-down current source returns this node to 0V when the switches are turned off. SENSE - (Pin 12): Inrush Current Input. This pin should be connected directly to the bottom (output side) of the low valued resistor in series with the two input power selector switch pairs, SW A1/B1 and SW A2/B2, for detecting and controlling the inrush current into and out of the power supply sources and the output capacitor. SENSE + (Pin 13): Inrush Current Input. This pin should be connected directly to the top (switch side) of the low valued resistor in series with the two input power selector switch pairs, SW A1/B1 and SW A2/B2, for detecting and controlling the inrush current into and out of the power supply sources and the output capacitor. Current limit is invoked when (VSENSE + - VSENSE -) exceeds 0.2V.
NOMINAL (V) TYP MAX 1 2 1 2 1 2 1.16 2.8 9 10.2 20 0 20 0 0 17 0 10 0 17 0 10 0 10 0 17 0 10 0 17 MIN 0.4 0.4 0.4 ABSOLUTE MAX (V) MIN MAX - 0.3 7 - 0.3 7 - 0.3 7 - 0.3 5 - 0.3 10 - 0.3 20 - 0.3 20 0 0 - 0.3 20 - 0.3 10 - 0.3 20 - 0.3 10 - 0.3 10 - 0.3 20 - 0.3 10 - 0.3 20
Pin Function Table
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 NAME IN1 IN2 DIODE TIMER V+ VGG SW GND GB2 SAB2 GA2 SENSE - SENSE + GB1 SAB1 GA1 DESCRIPTION Logic Input of Gate Drivers GA1 and GB1 Logic Input of Gate Drivers GA2 and GB2 "2-Diode Mode" Logic Input Fault Timer Programs Time in Current Limit Power Supply Gate Driver Supply Switch Node of Internal Boost Switching Regulator Ground Switch Gate Driver for Switch B2 Source Return of Switch 2 Switch Gate Driver for Switch A2 Inrush Current Input, Low Side Inrush Current Input, High Side Switch Gate Driver for Switch B1 Source Return of Switch 1 Switch Gate Driver for Switch A1
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LTC1473L
PI FU CTIO S
GB1, GA1 (Pins 14, 16): Switch Gate Drivers. GA1 and GB1 drive the gates of the first back-to-back external N-channel switches. SAB1 (Pin 15): Source Return. The SAB1 pin is connected to the sources of SW A1 and SW B1. A small pull-down current source returns this node to 0V when the switches are turned off.
FU CTIO AL DIAGRA
IN1 IN2
1 2 INRUSH CURRENT SENSE
DIODE
3 V+ SW A2/B2 GATE DRIVERS 11 GA2
6A
TIMER
4
TO GATE DRIVERS V+ VGG SW 5 6 7 VGG SWITCHING REGULATOR 1.16V 900k
GND
8
6
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16 GA1 SW A1/B1 GATE DRIVERS
15 SAB1
14 GB1 13 SENSE + 12 SENSE -
10 SAB2
9 GB2
R
+
S
LATCH
-
1473 FD
LTC1473L
OPERATIO
The LTC1473L is responsible for low-loss switching and isolation for a dual supply system, where during a power backup situation, a battery pack can be connected or disconnected seamlessly. Smooth switching between input power sources is accomplished with the help of low-loss N-channel switches. They are driven by special gate drive circuitry which limits the inrush current in and out of the battery packs and the system power supply capacitors. All N-Channel Switching The LTC1473L drives external back-to-back N-channel MOSFET switches to direct power from two sources: the primary battery and the secondary battery, or a battery and a DC power supply. (N-channel MOSFET switches are more cost effective and provide lower voltage drops than their P-channel counterparts.) Gate Drive (VGG) Power Supply The gate drive for the low-loss N-channel switches is supplied by an internal micropower boost regulator which is regulated at approximately 8.5V above V +, up to 20V maximum. In a DC supply and backup battery system, the LTC1473L V + pin is diode ORed through two external Schottky diodes connected to the two main power sources, DCIN and BAT1. Thus, VGG is regulated at 8.5V above the higher power source and will provide the overdrive required to fully enhance the MOSFET switches. For maximum efficiency the input to the boost regulator inductor is connected to V + as shown in Figure 1. C1 provides filtering to the input of the 1mH switched inductor, L1, which is housed in a small surface mount package. An internal diode directs the current from the 1mH inductor to the VGG output capacitor C2. Inrush and Short-Circuit Current Limiting The LTC1473L uses an adaptive inrush current limiting scheme to reduce current flowing in and out of the battery and the following system's input capacitor during switchover transitions. The voltage across a single small valued resistor, RSENSE, is measured to ascertain the instantaneous current flowing through either of the two switch pairs, SW A1/B1 and SW A2/B2, during the transitions.
BAT1
VGG SWITCHING REGULATOR DCIN LTC1473L BAT1
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Figure 2 shows a block diagram of a switch driver pair, SW A1/B1. A bidirectional current sensing and limiting circuit determines when the voltage drop across RSENSE reaches 200mV. The gate-to-source voltage, VGS, of the appropriate switch is limited during the transition period until the inrush current subsides. This scheme allows capacitors and MOSFET switches of differing sizes and current ratings to be used in the same system without circuit modifications.
V+ L1 1mH TO GATE DRIVERS (8.5V + V +) VGG SW C1 1F 25V C2 1F 25V GND
1473 F01
Figure 1. VGG Switching Regulator
SW A1
SW B1
RSENSE
OUTPUT LOAD
+
COUT GA1 6V SAB1 6V GB1 VSENSE + 200mV THRESHOLD VSENSE -
VGG SW A/B GATE DRIVERS
BIDIRECTIONAL INRUSH CURRENT SENSING AND LIMITING
LTC1473L
1473 F02
Figure 2. SW A1/B1 Inrush Current Limiting
7
LTC1473L
APPLICATIO S I FOR ATIO
After the transition period, the VGS of both MOSFETs in the selected switch pair rises to approximately 5.6V. The gate drive is set at 5.6V to provide ample overdrive for logiclevel MOSFET switches without exceeding their maximum VGS rating. In the event of a fault condition, the current limit loop limits the inrush of current into the short. At the instant the MOSFET switch is in current limit, i.e., when the voltage drop across RSENSE is 200mV, a fault timer starts timing. It will continue to time as long as the MOSFET switch is in current limit. Eventually the preset time will lapse and the MOSFET switch will latch off. The latch is reset by deselecting the gate drive input. Fault time-out is programmed by an external capacitor connected between the TIMER pin and ground. POWER PATH SWITCHING CONCEPTS Back-to-Back Switch Topology Power Source Selection The LTC1473L drives low-loss switches to direct power from either the battery pack or the DC supply during power backup situations. Figure 3 is a conceptual block diagram that illustrates the main features of an LTC1473L dual supply power management system starting with a 4 NiMH battery pack and a 5V/ 3.3V DC supply and ending with an uninterrupted output load. Switches SW A1/B1 and SW A2/B2 direct power from either the DC supply or the battery to the output load. The simple SPST switches shown in Figure 3 actually consist of two back-to-back N-channel switches. These low-loss N-channel switch pairs are housed in 8-pin SO or SSOP packaging and are available from a number of manufacturers. The back-to-back topology eliminates the problems associated with the inherent body diodes in power MOSFET switches and allows each switch pair to block current flow in either direction when the two switches are turned off.
SW A1/B1 DCIN 5V/3.3V SW A2/B2 BAT1 4 NiMH
Figure 3. LTC1473L PowerPath Conceptual Diagram
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Each of the switches is controlled by a logic compatible input that can interface directly with a digital pin. Using Tantalum Capacitors The inrush (and "outrush") current of the load capacitor is limited by the LTC1473L, i.e., the current flowing both in and out of the capacitor during transitions from one input power source to another is limited. In many applications, this inrush current limiting makes it feasible to use lower cost/size tantalum surface mount capacitors in place of more expensive/larger aluminum electrolytics.
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Note: The capacitor manufacturer should be consulted for specific inrush current specifications and limitations and some experimentation may be required to ensure compliance with these limitations under all possible operating conditions.
INRUSH CURRENT LIMITING
+
CLOAD
LTC1473L
1473 F03
LTC1473L
APPLICATIO S I FOR ATIO
The back-to-back topology also allows for independent control of each half of the switch pair which facilitates bidirectional inrush current limiting and the so-called "2-diode mode" described in the following section. The 2-Diode Mode Under normal operating conditions, both halves of each switch pair are turned on and off simultaneously. For example, when the input power source is switched from BAT1 to DCIN in Figure 4, both gates of switch pair SW A1/B1 are normally turned off and both gates of switch pair SW A2/B2 are turned on. The back-to-back body diodes in switch pair, SW A1/B1, block current flow in or out of the BAT1 input connector. In the "2-diode mode," only the first half of each power path switch pair, i.e., SW A1 and SW A2, is turned on; and the second half, i.e., SW B1 and SW B2, is turned off. These two switch pairs now act simply as two diodes connected to the two main input power sources as illustrated in Figure 4. The power path diode with the highest input voltage passes current through to the output load to ensure that the output is powered even under start-up or abnormal operating conditions. (An undervoltage lockout circuit defeats this mode when the V + pin drops below 2.5V. The supply to V + comes from the main power
SW B1 SW A1 BAT1 ON SW B2 OFF SW A2 DCIN ON RSENSE
Figure 4. LTC1473L PowerPath Switches in 2-Diode Mode
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sources, DCIN and BAT1 through two common cathode Schottky diodes as shown in Figure 1.) The 2-diode mode is asserted by applying an active low to the DIODE input. COMPONENT SELECTION N-Channel Switches The LTC1473L adaptive inrush limiting circuitry permits the use of a wide range of logic-level N-Channel MOSFET switches. A number of dual low RDS(ON) N-channel switches in 8-lead surface mount packages are available that are well suited for LTC1473L applications. The maximum allowable drain-source voltage, VDS(MAX), of the two switch pairs, SW A1/B1 and SW A2/B2 must be high enough to withstand the maximum input DC supply voltage. Since the DC supply is in the 3.3V to 10V range, 12V MOSFET switches will suffice. As a general rule, select the switch with the lowest RDS(ON) at the maximum allowable VDS. This will minimize the heat dissipated in the switches while increasing the overall system efficiency. Higher switch resistances can be tolerated in some systems with lower current requirements, but care should be taken to ensure that the
+
CIN OUTPUT LOAD OFF LTC1473L
1473 F04
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LTC1473L
APPLICATIO S I FOR ATIO
power dissipated in the switches is never allowed to rise above the manufacturers' recommended level. Inrush Current Sense Resistor, RSENSE A small valued sense resistor (current shunt) is used by the two switch pair drivers to measure and limit the inrush or short-circuit current flowing through the conducting switch pair. The inrush current limit should be set at approximately 2x or 3x the maximum required output current. For example, if the maximum current required by the DC/DC converter is 2A, an inrush current limit of 6A is set by selecting a 0.033 sense resistor, RSENSE, using the following formula: RSENSE = (200mV)/IINRUSH Note that the voltage drop across the resistor in this example is only 66mV under normal operating conditions. Therefore, the power dissipated in the resistor is extremely small (132mW), and a small 1/4W surface mount resistor can be used in this application (the resistor will tolerate the higher power dissipation during current limit for the duration of the fault time-out). A number of small valued surface mount resistors are available that have been specifically designed for high efficiency current sensing applications. Programmable Fault Timer Capacitor, CTIMER A fault timer capacitor, CTIMER, is used to program the time duration the MOSFET switches are allowed to be in current limit continuously. This feature can be disabled by either grounding the TIMER pin or asserting DIODE low and asserting either IN1 or IN2 high. In the event of a fault condition, the MOSFET switch is driven into current limit by the inrush current limit loop. The MOSFET switch operating in current limit is in a high dissipation mode and can fail catastrophically if not promptly terminated. The fault time delay is programmed with an external capacitor connected between the TIMER pin and GND. At
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the instant the MOSFET switch enters current limit, a 6A current source starts charging CTIMER through the TIMER pin. When the voltage across CTIMER reaches 1.16V an internal latch is set and the MOSFET switch is turned off. To reset the latch, the logic input of the MOSFET gate driver must be deselected. The fault time delay should be programmed as large as possible, at least 3x to 5x the maximum switching transition period, to avoid prematurely tripping the protection circuit. Conversely, for the protection circuit to be effective, the fault time delay must be within the safe operating area of the MOSFET switches as stated in the manufacturer's data sheet. The maximum switching transition period happens during a cold start, when a fully charged battery is connected to an unpowered system. The inrush current charging up the system supply capacitor to the battery voltage determines the switching transition period. The following example illustrates the calculation of CTIMER. Assume the maximum battery voltage is 10V, the system supply capacitor is 100F, the inrush current limit is 6A and the maximum current required by the following system is 2A. Then, the maximum switching transition period is calculated using the following formula:
tSW(MAX) = IINRUSH - ILOAD (10)(100F ) = 250s tSW(MAX) = 6 A - 2A
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(VBAT(MAX) )(CIN(SYSTEM) )
Multiplying 3 by 250s gives 0.75ms, the minimum fault delay time. Make sure this delay time does not fall outside of the safe operating area of the MOSFET switch dissipating 30W (6A * 10V/2). Using this delay time the CTIMER can be calculated using the following formula: 6A CITMER = 0.75ms = 3879pF 1.16V Therefore, CTIMER can be 3900pF.
LTC1473L
APPLICATIO S I FOR ATIO
VGG Regulator Inductor and Capacitors The VGG regulator provides a power supply voltage significantly higher than either of the two main power source voltages to allow the control of N-channel MOSFET switches. This micropower, step-up voltage regulator is powered by the higher potential available from the two main power sources for maximum regulator efficiency.
LTC1473L
TO GATE DRIVERS
VGG SWITCHING REGULATOR
*COILCRAFT 1812LS-105 XKBC. (708) 639-6400
Figure 5. VGG Step-Up Switching Regulator
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Three external components are required by the VGG regulator: L1, C1 and C2, as shown in Figure 5. L1 is a small, low current, 1mH surface mount inductor. C1 provides filtering to the input of the 1mH switched inductor and should be at least 1F to filter switching transients. The VGG output capacitor, C2, provides storage and filtering for the VGG output and should be at least 1F and rated for 25V operation. C1 and C2 can be ceramic capacitors.
DCIN BAT1 V+ L1* 1mH (8.5V + V +) VGG SW C1 1F 25V C2 1F 25V GND
1473 F05
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LTC1473L
TYPICAL APPLICATIO S U
LTC1473L with Battery Charger
DCIN 3.3V C3 22F 25V VIN SYNC AND/OR SHDN S/S LT(R)1512 L1A* C2** 22F VSW FB R4 24 C4 0.22F R3 1 L1B* R1 47.55k R2 12.45k CTIMER 2000pF *L1A, L1B ARE TWO 33H WINDINGS ON A SINGLE INDUCTOR: COILTRONICS CTX33-3 **TOKIN CERAMIC 1E22ZY5U-C203-F 1mH 1F 1F C1 22F 25V LOGIC DRIVEN D1 MBRS130LT3 100mA BAT54C 1 2 3 4 5 6 7 8 LTC1473L IN1 IN2 DIODE TIMER V
+
Si9926DY
GND GND C5 0.1F R5 1k
VC IFB
GA1 SAB1 GB1 SENSE
+
16 15 14 13 12 11 10 9 RSENSE 0.04
SENSE - GA2 SAB2 GB2
+
3.3V OR VBAT1 COUT
VGG SW GND
1473 TA03
BAT1 4 NiMH
Si9926DY
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LTC1473L
TYPICAL APPLICATIO S
2-Cell Li-Ion to 5V/3.5A DC/DC Converter with Battery Charger and Automatic Switchover Between Battery and DCIN
C2, 0.1F COSC 51pF 1 CSS, 0.1F RC, 33k CC2, 220pF CC 470pF 2 3 4 5 COSC RUN/SS ITH SFB TG BOOST SW VIN 16 15 14 D1 CMDSH-3 C4 0.1F L1* 10H RSENSE 0.015 COUT 100F 10V x3 SGND M1 Si4412DY
C1 100pF
C5 1000pF
74C00
13 12
7 3 6
10 9
1
2
4
5 14
D3 6.8V
1 R6 900k 1% R7 130k 1% R8 427k 1% R9 113k 1% 2 3 4
OUT A V-
OUT B
8
LTC1442
7 V+ REF 6 5 R10 50k 1% R11 1132k 1%
IN + A IN - B
HYST
*SUMIDA CDRH125-10 **COILCRAFT 1812LS-105XKBC ***COILTRONICS CTX20-4 C16 220pF RSENSE 0.033 8.4V Li-Ion BATTERY
U
+
CIN 22F 30V OS-CON
13 LTC1735 12 INTVCC SGND 11 6 BG VOSENSE 10 7 - SENSE PGND 9 8 SENSE + EXTVCC 5V
+
C3 4.7F 16V
M2 Si4412DY
+
VOUT 5V/3.5A R1 105k 1% C6 100pF
D2 MBRS140T3
R2 20k 1%
Si9926DY
11
BAT54C 1 2 3 IN1 IN2
LTC1473L GA1 SAB1 GB1 SENSE + SENSE - GA2 SAB2 GB2
16 15 14 13 12 11 10 9 RSENSE 0.033
8 4 5 2600pF CTIMER C7 1F 6 C8 1F 7 L2** 1mH 8
DIODE TIMER V+ VGG SW GND
R5 500k
DCIN D4 MBRD340 RSENSE 0.033 D5 MBRD340 1 2,3 L3*** 20H R12 3k 1% C9 0.1F R13 5.1k 1% 1,4 C11 0.47F 2 3 4 5 6 7 8 9 10 11 12 R18, 200, 1% GND SW BOOST GND GND UV GND OVP CLP CLN COMP1 SENSE LT1511 GND GND VCC1 VCC2 VCC3 PROG VC 24 23 22 21 20 19 18 17 16 15 14 13 R19 200 1% R15 1k C15 0.33F R16 300 C14 1F R17 4.93k C12 10F C13 10F
Si9926DY
R14 510 C10 1F
D6 MBR0540T
UVOUT GND COMP2 BAT SPIN
+
C17 10F
R20 395k 0.1% R21 164k 0.1%
1473 TA04
13
LTC1473L
TYPICAL APPLICATIO S
Automatic PowerPath Switching for 3.3V Applications
DCIN 3.3V Si4966DY R1 1.65M 1% R2 1.13M 1%
LTC1442 3
7 1
+ -
6 5
+
8 4
-
1.182V 2 CTIMER 4700pF 1F 1mH* 1F
DCIN 3.3V LTC1473L IN1 IN2 DIODE TIMER V+ VGG SW GND GA1 SAB1 GB1
BAT54C LOGIC DRIVEN
CTIMER 550pF
1F
1F
DCIN 5V
14
U
BAT54C
1 2 3 4 5 6 7 8
LTC1473L IN1 IN2 DIODE TIMER V+ VGG SW GND GA1 SAB1 GB1
16 15 14 RSENSE 0.04
13 SENSE + 12 SENSE - 11 GA2 10 SAB2 9 GB2
+
3.3V OR VBAT1 COUT
BAT1 4 NiMH
1473 TA05
* COILCRAFT 18126S-105XKBC
Si4966DY
3.3V or 5V, 6A, PowerPath Switch
Si4966DY
1 2 3 4 5 6 1mH 7 8
16 15 14 RSENSE 0.015
13 SENSE + 12 SENSE - 11 GA2 10 SAB2 9 GB2
+
COUT
3.3V OR 5V 6A
1473 TA06
Si4966DY
LTC1473L
TYPICAL APPLICATIO S
Protected Hot SwapTM Switchover Between Two Supplies for Portable PC
DOCKING CONNECTOR 5V LONG PIN 100k SUPPLY V1 5V D1 MMBD2838LT1 Q1 Si9926DY
100k C6 4700pF C7 1F L1*, 1mH C5 1F SUPPLY V2 3.3V
*1812LS-105XKBC, COILCRAFT SHORT PIN
PACKAGE DESCRIPTIO
0.007 - 0.0098 (0.178 - 0.249) 0.016 - 0.050 (0.406 - 1.270)
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
U
1 2 3 4 5 6 7 8
LTC1473L IN1 IN2 DIODE TIMER V+ VGG SW GND GA1 SAB1 GB1 SENSE
16 15 14 R3 0.1
+ 13
OUT
SENSE - GA2 SAB2 GB2
12 11 10 9 LONG PIN
Q2 Si9926DY ON
1473 * TA07
Dimensions in inches (millimeters) unless otherwise noted. GN Package 16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.189 - 0.196* (4.801 - 4.978) 16 15 14 13 12 11 10 9 0.009 (0.229) REF
0.229 - 0.244 (5.817 - 6.198)
0.150 - 0.157** (3.810 - 3.988)
1 0.015 0.004 x 45 (0.38 0.10) 0 - 8 TYP 0.053 - 0.068 (1.351 - 1.727)
23
4
56
7
8 0.004 - 0.0098 (0.102 - 0.249)
0.008 - 0.012 (0.203 - 0.305)
0.0250 (0.635) BSC
GN16 (SSOP) 1098
Hot Swap is a trademark of Linear Technology Corporation
15
LTC1473L
TYPICAL APPLICATIO
5V
SUPPLY V1 10k 1M 1M 3 1F BAT54C LT1490 1 2 1 5 4 6 LTC1473L IN1 IN2 DIODE TIMER V+ VGG SW GND GA1 SAB1 GB1 SENSE 16 15 14 R3 0.033 OUT
+ -
8
+
7
-
C6 2600pF C7 1F L1*, 1mH C5 1F
1M 1M 10k SUPPLY V2 *1812LS-105XKBC, COILCRAFT
RELATED PARTS
PART NUMBER
LTC1155 LTC1161 LTC1735 LTC1473 LTC1479 LT1505 LT1510 LT1511 LTC1558/LTC1559 LTC1622 LTC1628 LT1769
DESCRIPTION
Dual High Side Micropower MOSFET Driver Quad Protected High Side MOSFET Driver Single High Efficiency Synchronous DC/DC Controller Dual PowerPath Switch Driver PowerPath Controller for Dual Battery Systems Synchronous Battery Charger with Adapter Current Limit Constant-Voltage/Constant-Current Battery Charger 3A Constant-Voltage/Constant-Current Battery Charger Backup Battery Controller with Programmable Output Current Mode Step-Down DC/DC Converter Dual High Efficiency Synchronous Buck DC/DC Controller 2A Constant-Voltage/Constant-Current Battery Charger
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
U
Protected Automatic Switchover Between Two Supplies
1 LT1121-5 3 8 Q1 Si9926DY 2 3 4 5 6 7 8
+ 13
SENSE - GA2 SAB2 GB2
12 11 10 9
Q2 Si9926DY
1473 * TA02
COMMENTS
Internal Charge Pump Requires No External Components Rugged, Designed for Harsh Environment Constant Frequency, 3.5 VIN 36V, Fault Protection V + Range from 4.75V to 30V Designed to Interface with a Power Management P High Efficiency, Up to 8A Charge Current, End-of-Charge Flag, 28-Pin SSOP, 0.5V Dropout Voltage Up to 1.5A Charge Current for Lithium-Ion, NiCd and NiMH Batteries High Efficiency, Minimal External Components to Fast Charge Lithium, NiMH and NiCd Batteries Power Supply Backup Using a Single NiCd Cell 550kHz Operation, 100% Duty Cycle, VIN from 2V to 10V 2-Phase Switching, 5V Standby in Shutdown, Fault Protection Charges Lithium, NiCd and NiMH Batteries, 28-Lead SSOP
1473lf LT/TP 1099 4K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 1999

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